In previous methods of detecting addressing errors, an error occurring in these electrical units was only detected when an addressed module did not respond within a specified time. This performance defect is usually described as an acknowledgement delay. Another defect may be that a module signals as if it had been addressed even though the central processor had not addressed that module. Currently, however, no methods are known for detecting whether a defective module responds to an addressing because of this type of hardware error rather than a true addressing. It is inconsequential in such a case whether the defective module responds in place of the addressed module or in addition to that module. In both cases, the consequences are that significant faulty responses are recorded by the electrical unit.
Therefore, there is a need for a method which will enable a faulty response on the part of a defective module to be quickly identified.